Module Catalogues, Xi'an Jiaotong-Liverpool University   
 
Module Code: EEE112
Module Title: Integrated Electronics and Design
Module Level: Level 1
Module Credits: 2.50
Academic Year: 2019/20
Semester: SEM2
Originating Department: Electrical and Electronic Engineering
Pre-requisites: EEE103EEE109PHY002
   
Aims
1.To provide students with the opportunity to understand the basic principles of silicon microelectronics design.

2.To introduce the subject in the frame of reference of basic design rather than problem solving.

3.To develop practical skills in the handling and measurement of components.

4.To increase the confidence of the student in undertaking material with a strong analytical and engineering content.

5.To provide the underlying semiconductor physics to underpin this design-led module
Learning outcomes 
A. Understand physical laws of semiconductor and mapping to diodes & transistors.

B. Understand why certain electronic materials are used in devices.

C. Get familiar with common designs of electronic devices, and simple MOS circuits.

D. Design a simple MOS circuit including tolerance and feature sizes.

E. Acquire independent learning and design skills coupled with problem solving skills.

Method of teaching and learning 
This module is delivered through a combination of formal lectures, tutorials, design exercises and supervised laboratory sessions. There is a particular emphasis on developing design skills alongside problems solving.
Syllabus 
Semiconductors Electrons in solids;

Energy bands;

Intrinsic and extrinsic silicon;

Fundamentals of transport mechanisms:

Drift, diffusion, recombination;

Diodes pn junction fabrication;

Depletion regions;

Capacitance, multiplication;

Ideal and non-ideal forward and reverse bias conduction;

MOS capacitors and surface field effect;

Accumulation, depletion and inversion;

Capacitance-voltage characteristic for high and low frequency;

Extraction of oxide thickness and doping density;

Effect of parasitic oxide and interface charges;

MOS transistors and n MOS IC design;

Fabrication, operation, design principles and model equations;

Basic nMOS logic inverter circuits and performance metrics;

Delivery Hours  
Lectures Seminars Tutorials Lab/Prcaticals Fieldwork / Placement Other(Private study) Total
Hours/Semester 24     2  8  3  38  75 

Assessment

Sequence Method % of Final Mark
1 Final Exam 80.00
2 Assignment 5.00
3 Nmos Ic Design Projects 15.00

Module Catalogue generated from SITS CUT-OFF: 5/23/2019 5:35:07 AM